Large scale integration techniques have brought about the construction of large arrays of binary storage elements on a single chip of silicon. The storage cells, typically using MOS technology, consist of multicomponent circuits in a conventional bistable configuration. There are numerous advantages of such semiconductor storage devices including high packing density and low power requirements of such memory cells.
Numerous prior art static memory cells of an integrated circuit memory have been developed. A well known static memory cell circuit arrangement which utilizes six insulated gate MOS field-effect transistors is a cross-coupled inverter stage shown in U.S. Pat. No. 3,967,252 issued to Donnelly on June 29, 1976 and entitled "Sense Amp for Random Access Memory". Because of the relatively small capacitance of the cells compared to the capacitance of the column line, the voltage swing is usually small requiring the use of sense amplifier circuits to detect this small voltage swing on a column line. Such a sense amplifier is disclosed in the above referred to Donnelly patent. The use of sense amplifiers substantially complicates the fabrication and operation of a static memory cell.
A need has thus arisen for a static RAM cell in which data stored therein can be read by reading the logic levels stored therein without the use of sense amplifers. A need has further arisen for a low voltage operating static RAM cell operating with minimal quiescent current and which utilizes an X-Y addressing technique.